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TC
2010
13 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
NOCS
2010
IEEE
13 years 5 months ago
Evaluating Bufferless Flow Control for On-chip Networks
—With the emergence of on-chip networks, the power consumed by router buffers has become a primary concern. Bufferless flow control addresses this issue by removing router buffe...
George Michelogiannakis, Daniel Sanchez, William J...
TCAD
2010
105views more  TCAD 2010»
13 years 2 months ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
ISQED
2010
IEEE
133views Hardware» more  ISQED 2010»
13 years 5 months ago
UC-PHOTON: A novel hybrid photonic network-on-chip for multiple use-case applications
Multiple use-case chip multiprocessor (CMP) applications require adaptive on-chip communication fabrics to cope with changing use-case performance needs. Networks-on-chip (NoC) ha...
Shirish Bahirat, Sudeep Pasricha
DAC
2010
ACM
13 years 7 months ago
Virtual channels vs. multiple physical networks: a comparative analysis
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
Young-Jin Yoon, Nicola Concer, Michele Petracca, L...