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VLSID
2002
IEEE
78views VLSI» more  VLSID 2002»
14 years 9 months ago
Optimization of Test Accesses with a Combined BIST and External Test Scheme
External pins for test are precious hardware resources because this number is strongly restricted. Cores are tested via test access mechanisms (TAMs) such as a test bus architectu...
Makoto Sugihara, Hiroto Yasuura
SACI
2007
IEEE
14 years 3 months ago
Geometric Theory and Control of Linear Parameter Varying Systems
: Linear Parameter Varying(LPV) systems appear in a form of LTI state space representations where the elements of the A(ρ), B(ρ), C(ρ) matrices can depend on an unknown but at a...
Jozsef Bokor
ASYNC
2002
IEEE
124views Hardware» more  ASYNC 2002»
14 years 2 months ago
Synchronous Interlocked Pipelines
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Pe...
CODES
2002
IEEE
14 years 2 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
FOCS
2002
IEEE
14 years 2 months ago
Low-Dimensional Linear Programming with Violations
Two decades ago, Megiddo and Dyer showed that linear programming in two and three dimensions (and subsequently any constant number of dimensions) can be solved in linear time. In ...
Timothy M. Chan