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VTS
1998
IEEE
87views Hardware» more  VTS 1998»
14 years 3 months ago
Fast Self-Recovering Controllers
A fast fault-tolerant controller structure is presented, which is capable of recovering from transient faults by performing a rollback operation in hardware. The proposed fault-to...
Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wu...
VTS
1998
IEEE
124views Hardware» more  VTS 1998»
14 years 3 months ago
A Test Pattern Generation Methodology for Low-Power Consumption
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
VTS
1998
IEEE
88views Hardware» more  VTS 1998»
14 years 3 months ago
Transition Maximization Techniques for Enhancing the Two-Pattern Fault Coverage of Pseudorandom Test Pattern Generators
This paper presents simulation evidence supporting the use of bit transition maximization techniques in the design of hardware test pattern generators TPGs. Bit transition maximiz...
Bruce F. Cockburn, Albert L.-C. Kwong
VTS
1998
IEEE
97views Hardware» more  VTS 1998»
14 years 3 months ago
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...
VTS
1998
IEEE
98views Hardware» more  VTS 1998»
14 years 3 months ago
Experimental Results for IDDQ and VLV Testing
An experimental test chip was designed and manufactured to evaluate different test techniques. Based on the results presented in the wafer probe, 309 out of 5491 dies that passed ...
Jonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu,...