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GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
14 years 1 months ago
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. ...
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
14 years 1 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
RTCSA
1998
IEEE
14 years 1 months ago
Partition Scheduling in APEX Runtime Environment for Embedded Avionics Software
Advances in the computer technology encouraged the avionics industry to replace the federated design of control units with an integrated suite of control modules that share the co...
Yann-Hang Lee, Daeyoung Kim, Mohamed F. Younis, Je...
DAC
1998
ACM
14 years 1 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
14 years 1 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...