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BMCBI
2010
125views more  BMCBI 2010»
13 years 10 months ago
Active machine learning for transmembrane helix prediction
Background: About 30% of genes code for membrane proteins, which are involved in a wide variety of crucial biological functions. Despite their importance, experimentally determine...
Hatice U. Osmanbeyoglu, Jessica A. Wehner, Jaime G...
ASPDAC
2009
ACM
127views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Timing driven power gating in high-level synthesis
- The power gating technique is useful in reducing standby leakage current, but it increases the gate delay. For a functional unit, its maximum allowable delay (for a target clock ...
Shih-Hsu Huang, Chun-Hua Cheng
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
14 years 4 months ago
A Variation Aware High Level Synthesis Framework
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Feng Wang 0004, Guangyu Sun, Yuan Xie
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
14 years 4 months ago
Simultaneous FU and Register Binding Based on Network Flow Method
– With the rapid increase of design complexity and the decrease of device features in nano-scale technologies, interconnection optimization in digital systems becomes more and mo...
Jason Cong, Junjuan Xu
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 4 months ago
Multiple-Width Bus Partitioning Approach to Datapath Synthesis
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
Arash Ahmadi, Mark Zwolinski