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ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Instruction set and functional unit synthesis for SIMD processor cores
—This paper focuses on SIMD processor synthesis and proposes a SIMD instruction set/functional unit synthesis algorithm. Given an initial assembly code and a timing constraint, t...
Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka,...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 8 months ago
Application Specific Datapath Extension with Distributed I/O Functional Units
Performance of an application can be improved through augmenting the processor with Application specific Functional Units (AFUs). Usually a cluster of operations identified from th...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
ARITH
1993
IEEE
13 years 11 months ago
An accurate LNS arithmetic unit using interleaved memory function interpolator
This paper describes a logarithmic number system (LNS) arithmetic unit using a new methodfor polynomial interpolation in hardware. The use of an interleaved memory reduces storage...
David M. Lewis
ANTS
2000
Springer
87views Algorithms» more  ANTS 2000»
14 years 1 days ago
Reduction in Purely Cubic Function Fields of Unit Rank One
This paper analyzes reduction of fractional ideals in a purely cubic function field of unit rank one. The algorithm is used for generating all the reduced principal fractional ide...
Renate Scheidler
VLSID
2008
IEEE
111views VLSI» more  VLSID 2008»
14 years 8 months ago
Power Reduction of Functional Units Considering Temperature and Process Variations
Continuous technology scaling has resulted in an increase in both, the power density as well as the variation in device dimensions (process variations) of the manufactured process...
Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj...