HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
A microprocessor's performance is fundamentally limited by the rate at which it can resolve branch mispredictions. Control independence (CI) architectures look for useful con...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
In this paper, we explore the use of multi-band radio frequency interconnect (or RF-I) with signal propagation at the speed of light to provide shortcuts in a many core network-on...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
Recent advances in statistical inference and machine learning close the divide between simulation and classical optimization, thereby enabling more rigorous and robust microarchit...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
Converged fabrics that support data, storage, and cluster networking in a unified fashion are desirable for their cost and manageability advantages. Recent trends towards higher-b...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
As multicore systems become the dominant mainstream computing technology, one of the most difficult challenges the industry faces is the software. Applications with large amounts ...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
Serializing instructions (SIs), such as writes to control registers, have many complex dependencies, and are difficult to execute out-of-order (OoO). To avoid unnecessary complexi...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
HPCA
2008
IEEE
14 years 12 months ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...