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    FPGA
    2016
    ACM
    75views FPGA» more  FPGA 2016»
    FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures
    8 years 7 months ago
    FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures
    Download  lap.epfl.ch
    In theory, tools like VTR—a retargetable toolchain mapping circuits onto easily-described hypothetical FPGA architectures—could play a key role in the development of wildly in...
    Grace Zgheib, Manana Lortkipanidze, Muhsen Owaida,...
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    FPGA
    2016
    ACM
    72views FPGA» more  FPGA 2016»
    CASK: Open-Source Custom Architectures for Sparse Kernels
    8 years 7 months ago
    CASK: Open-Source Custom Architectures for Sparse Kernels
    Download  www.doc.ic.ac.uk
    Sparse matrix vector multiplication (SpMV) is an important kernel in many scientific applications. To improve the performance and applicability of FPGA based SpMV, we propose an ...
    Paul Grigoras, Pavel Burovskiy, Wayne Luk
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    FPGA
    2016
    ACM
    69views FPGA» more  FPGA 2016»
    A Case for Work-stealing on FPGAs with OpenCL Atomics
    8 years 7 months ago
    A Case for Work-stealing on FPGAs with OpenCL Atomics
    Download  cas.ee.ic.ac.uk
    We provide a case study of work-stealing, a popular method for run-time load balancing, on FPGAs. Following the Cederman–Tsigas implementation for GPUs, we synchronize workitems...
    Nadesh Ramanathan, John Wickerson, Felix Winterste...
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    FPGA
    2016
    ACM
    71views FPGA» more  FPGA 2016»
    Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis
    8 years 7 months ago
    Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis
    Download  kastner.ucsd.edu
    Field Programmable Gate Array (FPGA) implementations of sorting algorithms have proven to be efficient, but existing implementations lack portability and maintainability because t...
    Janarbek Matai, Dustin Richmond, Dajung Lee, Zac B...
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    FPGA
    2016
    ACM
    83views FPGA» more  FPGA 2016»
    GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths
    8 years 7 months ago
    GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths
    Download  nachiket.github.io
    Bitwidth optimization of FPGA datapaths can save hardware resources by choosing the fewest number of bits required for each datapath variable to achieve a desired quality of resul...
    Nachiket Kapre, Deheng Ye
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    FPGA
    2014
    ACM
    108views FPGA» more  FPGA 2014»
    Fast and effective placement and routing directed high-level synthesis for FPGAs
    9 years 6 months ago
    Fast and effective placement and routing directed high-level synthesis for FPGAs
    Download  www.researchgate.net
    Achievable frequency (fmax) is a widely used input constraint for designs targeting Field-Programmable Gate Arrays (FPGA), because of its impact on design latency and throughput. ...
    Hongbin Zheng, Swathi T. Gurumani, Kyle Rupnow, De...
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    FPGA
    2012
    ACM
    337views FPGA» more  FPGA 2012»
    Accelerator compiler for the VENICE vector processor
    12 years 7 months ago
    Accelerator compiler for the VENICE vector processor
    Download  www.ece.ubc.ca
    Zhiduo Liu, Aaron Severance, Satnam Singh, Guy G. ...
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    FPGA
    2012
    ACM
    300views FPGA» more  FPGA 2012»
    Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
    12 years 7 months ago
    Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
    Download  www.ece.ubc.ca
    In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
    Yehdhih Ould Mohammed Moctar, Nithin George, Hadi ...
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    FPGA
    2012
    ACM
    285views FPGA» more  FPGA 2012»
    Optimizing SDRAM bandwidth for custom FPGA loop accelerators
    12 years 7 months ago
    Optimizing SDRAM bandwidth for custom FPGA loop accelerators
    Download  cas.ee.ic.ac.uk
    Memory bandwidth is critical to achieving high performance in many FPGA applications. The bandwidth of SDRAM memories is, however, highly dependent upon the order in which address...
    Samuel Bayliss, George A. Constantinides
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    FS
    2011
    168views more  FS 2011»
    Gamma expansion of the Heston stochastic volatility model
    13 years 2 months ago
    Gamma expansion of the Heston stochastic volatility model
    Download  www2.gsb.columbia.edu
    Abstract We derive an explicit representation of the transitions of the Heston stochastic volatility model and use it for fast and accurate simulation of the model. Of particular i...
    Paul Glasserman, Kyoung-Kuk Kim
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