FS
2011
13 years 3 months ago
2011
Harrison and Kreps showed in 1978 how the heterogeneity of investor beliefs can drive speculation, leading the price of an asset to exceed its intrinsic value. By focusing on an e...
FPGA
2011
ACM
13 years 3 months ago
2011
ACM
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
FPGA
2011
ACM
13 years 3 months ago
2011
ACM
We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and connection and switch b...
FPGA
2011
ACM
13 years 3 months ago
2011
ACM
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
FPGA
2011
ACM
13 years 3 months ago
2011
ACM
As soft processors are increasingly used in diverse applications, there is a need to evolve their microarchitectures in a way that suits the FPGA implementation substrate. This pa...
ASPDAC
2011
ACM
13 years 3 months ago
2011
ACM
—This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
Publication
_2011.jpg "NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision")
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
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But it ain’t about how hard you hit... it’s about how hard you can get hit, and keep moving forward. It’s how much you can take, and keep moving forward. That’s how winning...
TVLSI
2010
13 years 6 months ago
2010
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP...
JSA
2010
13 years 6 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...