Sciweavers

ETS
2000
IEEE
220views Hardware» more  ETS 2000»
13 years 11 months ago
Law On-Line: A Collaborative, Web-Based Journey in the Law and Social Sciences
During Spring 1998, we embarked on pedagogical journey into unknown terrains -- the terrains of collaborative teaching and World Wide Web instruction. In this paper we present a j...
Cynthia L. Cates, Wayne V. McIntosh
ETS
2000
IEEE
126views Hardware» more  ETS 2000»
13 years 11 months ago
Different (Key)strokes for Different Folks: Designing online venues for professional communities
Educational on-line resources are expanding in their application beyond delivering courses to providing venues in which members of professional communities of practice meet to exc...
Liwana S. Bringelson, Tom Carey
MICRO
2007
IEEE
71views Hardware» more  MICRO 2007»
13 years 11 months ago
Effective Optimistic-Checker Tandem Core Design through Architectural Pruning
Design complexity is rapidly becoming a limiting factor in the design of modern, high-performance microprocessors. This paper introduces an optimization technique to improve the e...
Francisco J. Mesa-Martinez, Jose Renau
VLSISP
2008
203views more  VLSISP 2008»
13 years 11 months ago
FPGA-based System for Real-Time Video Texture Analysis
This paper describes a novel system for real-time video texture analysis. The system utilizes hardware to extract 2nd -order statistical features from video frames. These features ...
Dimitrios E. Maroulis, Dimitrios K. Iakovidis, Dim...
JSA
2007
142views more  JSA 2007»
13 years 11 months ago
Efficient FPGA hardware development: A multi-language approach
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi
JIRS
2007
108views more  JIRS 2007»
13 years 11 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger
JCP
2007
154views more  JCP 2007»
13 years 11 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras
ISCA
2007
IEEE
217views Hardware» more  ISCA 2007»
13 years 11 months ago
Parallel Processing of High-Dimensional Remote Sensing Images Using Cluster Computer Architectures
Hyperspectral sensors represent the most advanced instruments currently available for remote sensing of the Earth. The high spatial and spectral resolution of the images supplied ...
David Valencia, Antonio Plaza, Pablo Martín...
ISCA
2007
IEEE
130views Hardware» more  ISCA 2007»
13 years 11 months ago
Non-Inclusion Property in Multi-Level Caches Revisited
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...
Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj F...