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ASPDAC
2008
ACM
174views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty
In modern circuit design, it is difficult to provide reliable parametric yield prediction since the real distribution of process data is hard to measure. Most existing approaches ...
Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
14 years 1 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt
ASPDAC
2008
ACM
74views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Large-scale fixed-outline floorplanning design using convex optimization techniques
A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first st...
Chaomin Luo, Miguel F. Anjos, Anthony Vannelli
ASPDAC
2008
ACM
150views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Bus-aware microarchitectural floorplanning
Abstract-- In this paper we present the first bus-aware microarchitectural floorplanning. Our goal is to study the impact of bus routability on other important floorplanning object...
Dae Hyun Kim, Sung Kyu Lim
ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Buffered clock tree synthesis for 3D ICs under thermal variations
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...
Jacob R. Minz, Xin Zhao, Sung Kyu Lim
ASPDAC
2008
ACM
118views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Statistical gate delay model for Multiple Input Switching
Takayuki Fukuoka, Akira Tsuchiya, Hidetoshi Onoder...
ASPDAC
2008
ACM
129views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Clock tree synthesis with data-path sensitivity matching
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
14 years 1 months ago
LP based white space redistribution for thermal via planning and performance optimization in 3D ICs
: Thermal issue is a critical challenge in 3D IC circuit design. Incorporating thermal vias into 3D IC is a promising way to mitigate thermal issues by lowering down the thermal re...
Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong, Jas...
ASPDAC
2008
ACM
86views Hardware» more  ASPDAC 2008»
14 years 1 months ago
An MILP-based wire spreading algorithm for PSM-aware layout modification
Phase shifting mask (PSM) is a promising resolution enhancement technique, which is used in the deep sub-wavelength lithography of the VLSI fabrication process. However, applying ...
Ming-Chao Tsai, Yung-Chia Lin, Ting-Chi Wang