Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. &Ou...
In this paper we extend the domain of applicability of the E-method [7, 8], as a hardware-oriented method for evaluating elementary functions using polynomial and rational functio...
Nicolas Brisebarre, Sylvain Chevillard, Milos D. E...
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
Microphone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noi...
Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao...
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable archite...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...