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ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
14 years 1 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
ASPDAC
2008
ACM
126views Hardware» more  ASPDAC 2008»
14 years 1 months ago
A Multi-Processor NoC platform applied on the 802.11i TKIP cryptosystem
Since 2001, there have been a myriad of papers on systematic analysis of Multi-Processor System on Chip (MPSoC) and Network on Chip (NoC). Nevertheless, we only have a few of their...
Jung-Ho Lee, Sung-Rok Yoon, Kwang-Eui Pyun, Sin-Ch...
ASPDAC
2008
ACM
88views Hardware» more  ASPDAC 2008»
14 years 1 months ago
REWIRED - Register Write Inhibition by Resource Dedication
We propose REWIRED (REgister Write Inhibition by REsource Dedication), a technique for reducing power during high level synthesis (HLS) by selectively inhibiting the storage of fun...
Pushkar Tripathi, Rohan Jain, Srikanth Kurra, Pree...
ASPDAC
2008
ACM
71views Hardware» more  ASPDAC 2008»
14 years 1 months ago
A slew-rate controlled output driver with one-cycle tuning time
Young-Ho Kwak, Inhwa Jung, Chulwoo Kim
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
ASPDAC
2008
ACM
76views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Block remap with turnoff: A variation-tolerant cache design technique
Mohammed Abid Hussain, Madhu Mutyam
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong
ASPDAC
2008
ACM
98views Hardware» more  ASPDAC 2008»
14 years 1 months ago
A unified methodology for power supply noise reduction in modern microarchitecture design
In this paper, we present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Our methodology integrates ...
Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Le...
ASPDAC
2008
ACM
77views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Soft error rate reduction using redundancy addition and removal
Kai-Chiang Wu, Diana Marculescu
ASPDAC
2008
ACM
135views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Analog circuit simulation using range arithmetics
The impact of parameter variations in integrated analog circuits is usually analyzed by Monte Carlo methods with a high number of simulation runs. Few approaches based on interval ...
Darius Grabowski, Markus Olbrich, Erich Barke