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ISSS
1995
IEEE
59views Hardware» more  ISSS 1995»
14 years 3 months ago
Multiple-process behavioral synthesis for mixed hardware-software systems
Systems composed of microprocessors interacting with ASICs are necessarily multiple-process systems, since the controller in the microprocessor is separate from any controllers on...
Jay K. Adams, Donald E. Thomas
ISSS
1995
IEEE
91views Hardware» more  ISSS 1995»
14 years 3 months ago
Clustering for improved system-level functional partitioning
Frank Vahid, Daniel D. Gajski
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
14 years 3 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
ISSS
1995
IEEE
101views Hardware» more  ISSS 1995»
14 years 3 months ago
An approach to interface synthesis
This paper present a novel interface synthesis approach based on a one-sided interface description. Whereas most other approaches consider interface synthesis as optimizing a chan...
Jan Madsen, Bjarne Hald
ISSS
1995
IEEE
115views Hardware» more  ISSS 1995»
14 years 3 months ago
A system level design methodology for the optimization of heterogeneous multiprocessors
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...
Markus Schwiegershausen, Peter Pirsch
ISSS
1995
IEEE
83views Hardware» more  ISSS 1995»
14 years 3 months ago
Profiling in the ASP codesign environment
Automation of the Hardware/Software Codesign methodology brings with it the need to develop sophisticated high-level profiling tools. This paper presents a profiling tool which us...
Matthew F. Parkinson, Sri Parameswaran
ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
14 years 3 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...
ISSS
1995
IEEE
87views Hardware» more  ISSS 1995»
14 years 3 months ago
Industrial experience using rule-driven retargetable code generation for multimedia applications
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
Clifford Liem, Pierre G. Paulin, Marco Cornero, Ah...
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
14 years 3 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...