Sciweavers

ISPASS
2009
IEEE
14 years 6 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
ISPASS
2009
IEEE
14 years 6 months ago
Accuracy of performance counter measurements
Many workload characterization studies depend on accurate measurements of the cost of executing a piece of code. Often these measurements are conducted using infrastructures to ac...
Dmitrijs Zaparanuks, Milan Jovic, Matthias Hauswir...
ISPASS
2009
IEEE
14 years 6 months ago
Experiment flows and microbenchmarks for reverse engineering of branch predictor structures
Insights into branch predictor organization and operation can be used in architecture-aware compiler optimizations to improve program performance. Unfortunately, such details are ...
Vladimir Uzelac, Aleksandar Milenkovic
ISPASS
2009
IEEE
14 years 6 months ago
Analysis of the TRIPS prototype block predictor
This paper analyzes the performance of the TRIPS prototype chip’s block predictor. The prototype is the first implementation of the block-atomic TRIPS architecture, wherein the...
Nitya Ranganathan, Doug Burger, Stephen W. Keckler
ISPASS
2009
IEEE
14 years 6 months ago
User- and process-driven dynamic voltage and frequency scaling
We describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support dynamic voltage and frequency scaling (DVFS):...
Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Me...
ISPASS
2009
IEEE
14 years 6 months ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
ISPASS
2009
IEEE
14 years 6 months ago
Machine learning based online performance prediction for runtime parallelization and task scheduling
—With the emerging many-core paradigm, parallel programming must extend beyond its traditional realm of scientific applications. Converting existing sequential applications as w...
Jiangtian Li, Xiaosong Ma, Karan Singh, Martin Sch...
ISPASS
2009
IEEE
14 years 6 months ago
Differentiating the roles of IR measurement and simulation for power and temperature-aware design
In temperature-aware design, the presence or absence of a heatsink fundamentally changes the thermal behavior with important design implications. In recent years, chip-level infra...
Wei Huang, Kevin Skadron, Sudhanva Gurumurthi, Rob...
ISPASS
2009
IEEE
14 years 6 months ago
The data-centricity of Web 2.0 workloads and its impact on server performance
Advances in network performance and browser technologies, coupled with the ubiquity of internet access and proliferation of users, have lead to the emergence of a new class of web...
Moriyoshi Ohara, Priya Nagpurkar, Yohei Ueda, Kazu...
ECBS
2009
IEEE
119views Hardware» more  ECBS 2009»
14 years 6 months ago
Software Architectural Design Meets Security Engineering
Security requirements strongly influence the architectural design of complex IT systems in a similar way as other non-functional requirements. Both security engineering as well a...
Stephan Bode, Anja Fischer, Winfried E. Kühnh...