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DFT
1997
IEEE
108views VLSI» more  DFT 1997»
14 years 3 months ago
Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...
Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Ma...
DFT
1997
IEEE
141views VLSI» more  DFT 1997»
14 years 3 months ago
Analysis of a Hybrid Defect-Tolerance Scheme for High-Density Memory ICs
Recent increases in the density and size of memory ICs made it ne cessary to search for new defect tolerance techniques since the traditional methods are no longer e ective enough...
Israel Koren, Zahava Koren
DFT
1997
IEEE
93views VLSI» more  DFT 1997»
14 years 3 months ago
An IDDQ Sensor for Concurrent Timing Error Detection
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
Christopher G. Knight, Adit D. Singh, Victor P. Ne...
DFT
1997
IEEE
80views VLSI» more  DFT 1997»
14 years 3 months ago
Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo...
DFT
1997
IEEE
101views VLSI» more  DFT 1997»
14 years 3 months ago
Crosstalk Minimization in Three-Layer HVH Channel Routing
Crosstalk has become a major issue in VLSI design due to the high frequency, long interconnecting lines and small spacing between interconnects in today's integrated circuits...
Zhan Chen, Israel Koren
ARVLSI
1997
IEEE
103views VLSI» more  ARVLSI 1997»
14 years 3 months ago
Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control
George Kornaros, Christoforos E. Kozyrakis, Panagi...
ARVLSI
1997
IEEE
96views VLSI» more  ARVLSI 1997»
14 years 3 months ago
Circuits and Microarchitecture for Gigahertz VLSI Designs
IBM founded the Austin Research Laboratory to investigate high-performance microprocessorbased systems. Initial e orts have focused on design for high frequency. This resulted in ...
Kevin J. Nowka, H. Peter Hofstee
ARVLSI
1997
IEEE
89views VLSI» more  ARVLSI 1997»
14 years 3 months ago
Signal Delay in Coupled, Distributed RC Lines in the Presence of Temporal Proximity
V. Chandramouli, Karem A. Sakallah, Ayman I. Kayss...
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
14 years 3 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
ARVLSI
1997
IEEE
105views VLSI» more  ARVLSI 1997»
14 years 3 months ago
An Embedded DRAM for CMOS ASICs
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
John Poulton