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    GLVLSI
    1998
    IEEE
    99views VLSI» more  GLVLSI 1998»
    A Self Timed Asynchronous Router for an Heterogeneous Parallel Machine
    13 years 11 months ago
    A Self Timed Asynchronous Router for an Heterogeneous Parallel Machine
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    Eric Senn, Bertrand Zavidovique
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    GLVLSI
    1998
    IEEE
    83views VLSI» more  GLVLSI 1998»
    A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits
    13 years 11 months ago
    A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits
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    Kaamran Raahemifar, Majid Ahmadi
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    GLVLSI
    1998
    IEEE
    106views VLSI» more  GLVLSI 1998»
    Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling
    13 years 11 months ago
    Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling
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    Irith Pomeranz, Sudhakar M. Reddy
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    GLVLSI
    1998
    IEEE
    118views VLSI» more  GLVLSI 1998»
    Design of Clock Distribution Networks in Presence of Process Variations
    13 years 11 months ago
    Design of Clock Distribution Networks in Presence of Process Variations
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    Mohamed Nekili, Yvon Savaria, Guy Bois
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    GLVLSI
    1998
    IEEE
    107views VLSI» more  GLVLSI 1998»
    MDG-based Verification by Retiming and Combinational Transformations
    13 years 11 months ago
    MDG-based Verification by Retiming and Combinational Transformations
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    Otmane Aït Mohamed, Eduard Cerny, Xiaoyu Song
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    GLVLSI
    1998
    IEEE
    109views VLSI» more  GLVLSI 1998»
    A Quantitative Study of the Benefits of Area-I/O in FPGAs
    13 years 11 months ago
    A Quantitative Study of the Benefits of Area-I/O in FPGAs
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    Herwig Van Marck, Jo Depreitere, Dirk Stroobandt, ...
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    GLVLSI
    1998
    IEEE
    135views VLSI» more  GLVLSI 1998»
    The Chinese Abacus Method: Can We Use It for Digital Arithmetic?
    13 years 11 months ago
    The Chinese Abacus Method: Can We Use It for Digital Arithmetic?
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    Franco Maloberti, Chen Gang
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    GLVLSI
    1998
    IEEE
    119views VLSI» more  GLVLSI 1998»
    A Methodology for High Level Power Estimation and Exploration
    13 years 11 months ago
    A Methodology for High Level Power Estimation and Exploration
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    Vamsi Krishna, N. Ranganathan
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    GLVLSI
    1998
    IEEE
    84views VLSI» more  GLVLSI 1998»
    Practical Approaches to the Automatic Verification of an ATM Switch Fabric Using VIS
    13 years 11 months ago
    Practical Approaches to the Automatic Verification of an ATM Switch Fabric Using VIS
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    Jianping Lu, Sofiène Tahar
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    GLVLSI
    1998
    IEEE
    94views VLSI» more  GLVLSI 1998»
    Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation
    13 years 11 months ago
    Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation
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    Muhammad M. Khellah, Mohamed I. Elmasry
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