Sciweavers

ARC
2006
Springer
131views Hardware» more  ARC 2006»
14 years 4 months ago
Implementation of LPM Address Generators on FPGAs
Abstract. We propose the multiple LUT cascade as a means to configure an ninput LPM (Longest Prefix Match) address generator commonly used in routers to determine the output port g...
Hui Qin, Tsutomu Sasao, Jon T. Butler
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 5 months ago
Performance-Area Trade-Off of Address Generators for Address Decoder-Decoupled Memory
Multimedia applications are characterized by a large number of data accesses and complex array index manipulations. The built-in address decoder in the RAM memory model commonly u...
Sambuddhi Hettiaratchi, Peter Y. K. Cheung, Thomas...
DSD
2007
IEEE
88views Hardware» more  DSD 2007»
14 years 6 months ago
An Implementation of an Address Generator Using Hash Memories
An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the supe...
Tsutomu Sasao, Munehiro Matsuura