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ARC
2007
Springer
120views Hardware» more  ARC 2007»
13 years 11 months ago
Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
Jae Young Hur, Stephan Wong, Stamatis Vassiliadis
ARC
2007
Springer
140views Hardware» more  ARC 2007»
13 years 11 months ago
Reconfigurable Computing for Accelerating Protein Folding Simulations
Abstract. This paper presents a methodology for the design of a reconfigurable computing system applied to a complex problem in molecular Biology: the protein folding problem. An e...
Nilton B. Armstrong, Heitor S. Lopes, Carlos R. Er...
ARC
2007
Springer
150views Hardware» more  ARC 2007»
13 years 11 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
ARC
2007
Springer
118views Hardware» more  ARC 2007»
13 years 11 months ago
Simulation of the Dynamic Behavior of One-Dimensional Cellular Automata Using Reconfigurable Computing
This paper presents the implementation of an environment for the evolution of one-dimensional cellular automata using a reconfigurable logic device. This configware is aimed at eva...
Wagner Rodrigo Weinert, César Manuel Vargas...
ARC
2007
Springer
169views Hardware» more  ARC 2007»
14 years 1 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
ARC
2007
Springer
116views Hardware» more  ARC 2007»
14 years 1 months ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...
ARC
2007
Springer
140views Hardware» more  ARC 2007»
14 years 1 months ago
A Fast Finite Field Multiplier
We present a method for implementing a fast multiplier for finite fields GF(2m ) generated by irreducible trinomials of the form αm + αn
Edgar Ferrer, Dorothy Bollman, Oscar Moreno
ARC
2007
Springer
119views Hardware» more  ARC 2007»
14 years 1 months ago
Authentication of FPGA Bitstreams: Why and How
Abstract. Encryption of volatile FPGA bitstreams provides confidentiality to the design but does not ensure its authenticity. This paper motivates the need for adding authenticati...
Saar Drimer
ARC
2007
Springer
138views Hardware» more  ARC 2007»
14 years 1 months ago
Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array
Frank Bouwens, Mladen Berekovic, Andreas Kanstein,...
ARC
2007
Springer
115views Hardware» more  ARC 2007»
14 years 1 months ago
Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues
This paper presents an overview regarding the synthesis of regular expressions targeting FPGAs. It describes current solutions and a number of open issues. Implementation of regula...
João Bispo, Ioannis Sourdis, João M....