- This paper introduces the first hardwarekoftware co-synthesis algorithm that optimizes the implementations of ASICs that are used as processing elements for the embedded systems....
– This paper presents a novel circuit design technique to reduce the power dissipation in sequential circuits by generating a quasi-synchronous derived clock from the master cloc...
After a detailed analysis and discussion of two important characteristics of today’s battery cells (i.e., their current-capacity and current-voltage curves), this paper descr...
— An elevated central-channel doping with a depth similar to the S/D junctions is proposed as the best measure for simultaneously improving MOSFET device and high speed circuit p...
Masayasu Tanaka, N. Tokida, T. Okagaki, Michiko Mi...
ACMOS PWM imager which realizes block summation and 2D projection of a thresholded image, in addition to rowparallel PWM readout with gray scale, is reported. An imager including 5...