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ASPDAC
2005
ACM
111views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Fast floorplanning by look-ahead enabled recursive bipartitioning
A new paradigm is introduced for floorplanning any combination of fixed-shape and variable-shape blocks under tight fixedoutline area constraints and a wirelength objective. Dra...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
ASPDAC
2005
ACM
98views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Bitwidth-aware scheduling and binding in high-level synthesis
- Many high-level description languages, such as C/C++ or Java, lack the capability to specify the bitwidth information for variables and operations. Synthesis from these specifica...
Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, J...
ASPDAC
2005
ACM
138views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Crowdedness-balanced multilevel partitioning for uniform resource utilization
In this paper, we propose a new multi-objective multilevel K-way partitioning which is aware of resource utilization distribution, assuming the resource utilization for a partitio...
Yongseok Cheon, Martin D. F. Wong
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
ASPDAC
2005
ACM
65views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Multilevel full-chip gridless routing considering optical proximity correction
To handle modern routing with nanometer effects, we need to consider designs of variable wire widths and spacings, for which gridless routers are desirable due to their great fle...
Tai-Chen Chen, Yao-Wen Chang
ASPDAC
2005
ACM
140views Hardware» more  ASPDAC 2005»
14 years 5 months ago
A multi-level transmission line network approach for multi-giga hertz clock distribution
-In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
Hongyu Chen, Chung-Kuan Cheng
ASPDAC
2005
ACM
91views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Efficiently generating test vectors with state pruning
- This paper extends the depth first search (DFS) used in the previously proposed witness string method for generating efficient test vectors. A state pruning method is added that ...
Ying Chen, Dennis Abts, David J. Lilja
ASPDAC
2005
ACM
134views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Wire congestion and thermal aware 3D global placement
— The recent popularity of 3D IC technology stems from its enhanced performance capabilities and reduced wirelength. However, wire congestion and thermal issues are exacerbated d...
Karthik Balakrishnan, Vidit Nanda, Siddharth Easwa...
ASPDAC
2005
ACM
85views Hardware» more  ASPDAC 2005»
14 years 5 months ago
Integration of supercubing and learning in a SAT solver
Abstract— Learning is an essential pruning technique in modern SAT solvers, but it exploits a relatively small amount of information that can be deduced from the conflicts. Rece...
Domagoj Babic, Alan J. Hu