CORR
2006
Springer
14 years 10 days ago
2006
Springer
The paper studies the relatively inertial delays that represent one of the most important concepts in the modeling of the asynchronous circuits.
CORR
2008
Springer
14 years 12 days ago
2008
Springer
: The asynchronous systems are the models of the asynchronous circuits from the digital electrical engineering. An asynchronous system f is a multi-valued function that assigns to ...
DAC
2005
ACM
14 years 2 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
ASPDAC
2001
ACM
14 years 4 months ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
ACSD
2001
IEEE
14 years 4 months ago
2001
IEEE
This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such ...
FORMATS
2006
Springer
14 years 4 months ago
2006
Springer
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
CHES
2006
Springer
14 years 4 months ago
2006
Springer
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
ASYNC
2004
IEEE
14 years 4 months ago
2004
IEEE
De-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronizatio...
ACSD
2006
IEEE
14 years 4 months ago
2006
IEEE
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
ASYNC
1997
IEEE
14 years 4 months ago
1997
IEEE
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...