ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
Power distribution network (PDN) designs for today’s high performance integrated circuits (ICs) typically occupy a significant share of metal resources in the circuit, and henc...
ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...
ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
ATS
2009
IEEE
14 years 7 months ago
2009
IEEE
—Measuring the steady state leakage current (IDDQ) is very successful in detecting faults not discovered by standard fault models. But vector dependencies of IDDQ decrease the re...