ITC
1992
IEEE
14 years 4 months ago
1992
IEEE
This paper presents a BIST technique that allows the synchronization of multiple scan chains clocked at different frequencies. The technique is used to improve performance testing...
GLVLSI
2005
IEEE
14 years 6 months ago
2005
IEEE
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...