Buffer Locations | Sciweavers

VLSID
2002
IEEE

136views VLSI» more VLSID 2002»

Buffered Routing Tree Construction under Buffer Placement Blockages

14 years 12 months ago

Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...

Wei Chen, Massoud Pedram, Premal Buch

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DAC
1999
ACM

112views Computer Architecture» more DAC 1999»

Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations

15 years 13 days ago

Download www.ece.northwestern.edu

Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz

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