Sciweavers

    VLSID
    2002
    IEEE
    136views VLSI» more  VLSID 2002»
    Buffered Routing Tree Construction under Buffer Placement Blockages
    16 years 4 months ago
    Buffered Routing Tree Construction under Buffer Placement Blockages
    Download  atrak.usc.edu
    Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
    Wei Chen, Massoud Pedram, Premal Buch
    claim paper
    Read More »
    101
    Voted
    DAC
    1999
    ACM
    112views Computer Architecture» more  DAC 1999»
    Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations
    16 years 4 months ago
    Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations
    Download  www.ece.northwestern.edu
    Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    i2PDF i2Img i2Text i2OCR i2Symbol i2Type i2Speak i2Style i2Arabic i2Bopomo Latex Equation Editor
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2026, USA.