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    MICRO
    2002
    IEEE
    104views Hardware» more  MICRO 2002»
    Compiling for instruction cache performance on a multithreaded architecture
    14 years 5 months ago
    Compiling for instruction cache performance on a multithreaded architecture
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    Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
    Rakesh Kumar, Dean M. Tullsen
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