VLDB
2004
ACM
14 years 6 months ago
2004
ACM
Online transaction processing (OLTP) is a multibillion dollar industry with high-end database servers employing state-of-the-art processors to maximize performance. Unfortunately,...
NAA
2004
Springer
14 years 6 months ago
2004
Springer
In this paper, we develop a probabilistic model for estimation of the numbers of cache misses during the sparse matrix-vector multiplication (for both general and symmetric matrice...
ICCS
2004
Springer
14 years 6 months ago
2004
Springer
Abstract. For many applications, cache misses are the primary performance bottleneck. Even though much research has been performed on automatically optimizing cache behavior at the...
SPAA
2004
ACM
14 years 6 months ago
2004
ACM
We compare the number of cache misses M1 for running a computation on a single processor with cache size C1 to the total number of misses Mp for the same computation when using p ...
ASPLOS
2004
ACM
14 years 6 months ago
2004
ACM
Tracing garbage collectors traverse references from live program variables, transitively tracing out the closure of live objects. Memory accesses incurred during tracing are essen...
PPAM
2005
Springer
14 years 6 months ago
2005
Springer
Algorithms for the sparse matrix-vector multiplication (shortly SpM×V ) are important building blocks in solvers of sparse systems of linear equations. Due to matrix sparsity, the...
ESA
2005
Springer
14 years 6 months ago
2005
Springer
Abstract. We study three comparison-based problems related to multisets in the cache-oblivious model: Duplicate elimination, multisorting and finding the most frequent element (th...
CLUSTER
2005
IEEE
14 years 6 months ago
2005
IEEE
Data intensive applications on clusters often require requests quickly be sent to the node managing the desired data. In many applications, one must look through a sorted tree str...
SPAA
2006
ACM
14 years 6 months ago
2006
ACM
We present a technique for analyzing the number of cache misses incurred by multithreaded cache oblivious algorithms on an idealized parallel machine in which each processor has a...
ISCA
2006
IEEE
14 years 6 months ago
2006
IEEE
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...