DC
2008
13 years 11 months ago
2008
This study addresses the construction of a preset checking sequence that will not pose controllability (synchronization) and observability (undetectable output shift) problems whe...
ASE
2010
13 years 11 months ago
2010
Given a finite state machine M, a checking sequence is an input sequence that is guaranteed to lead to a failure if the implementation under test is faulty and has no more states t...
PTS
2008
14 years 19 days ago
2008
The problem of generating checking sequences for FSMs with distinguishing sequence has been attracting interest of researchers for several decades. In this paper, a solution is pro...
ISCIS
2005
Springer
14 years 4 months ago
2005
Springer
Abstract. Based on a distinguishing sequence for a Finite State Machine (FSM), an efficient checking sequence may be produced from the elements of a set Eα of α –sequences and ...
ISCIS
2009
Springer
14 years 5 months ago
2009
Springer
—Methods for software testing based on Finite State Machines (FSMs) have been researched since the early 60’s. Many of these methods are about generating a checking sequence fr...