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    DAC
    2005
    ACM
    106views Computer Architecture» more  DAC 2005»
    A generic micro-architectural test plan approach for microprocessor verification
    15 years 15 days ago
    A generic micro-architectural test plan approach for microprocessor verification
    Download  cadal.cse.nsysu.edu.tw
    Allon Adir, Hezi Azatchi, Eyal Bin, Ofer Peled, Ki...
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    DAC
    2005
    ACM
    122views Computer Architecture» more  DAC 2005»
    Statistical static timing analysis: how simple can we get?
    15 years 15 days ago
    Statistical static timing analysis: how simple can we get?
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    Chirayu S. Amin, Noel Menezes, Kip Killpack, Flore...
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    DAC
    2005
    ACM
    169views Computer Architecture» more  DAC 2005»
    A new canonical form for fast boolean matching in logic synthesis and verification
    15 years 15 days ago
    A new canonical form for fast boolean matching in logic synthesis and verification
    Download  atrak.usc.edu
    ? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
    Afshin Abdollahi, Massoud Pedram
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    DAC
    2005
    ACM
    184views Computer Architecture» more  DAC 2005»
    An effective power mode transition technique in MTCMOS circuits
    15 years 15 days ago
    An effective power mode transition technique in MTCMOS circuits
    Download  atrak.usc.edu
    - The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
    Afshin Abdollahi, Farzan Fallah, Massoud Pedram
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    DAC
    2005
    ACM
    133views Computer Architecture» more  DAC 2005»
    Efficient SAT solving: beyond supercubes
    15 years 15 days ago
    Efficient SAT solving: beyond supercubes
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    SAT (Boolean satisfiability) has become the primary Boolean reasoning engine for many EDA applications, so the efficiency of SAT solving is of great practical importance. Recently...
    Domagoj Babic, Jesse D. Bingham, Alan J. Hu
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    DAC
    2005
    ACM
    121views Computer Architecture» more  DAC 2005»
    Variations-aware low-power design with voltage scaling
    15 years 15 days ago
    Variations-aware low-power design with voltage scaling
    Download  www.eecg.toronto.edu
    We present a new methodology which takes into consideration the effect of Within-Die (WID) process variations on a low-voltage parallel system. We show that in the presence of pro...
    Navid Azizi, Muhammad M. Khellah, Vivek De, Farid ...
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