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DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 11 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann
DAC
2001
ACM
14 years 8 months ago
Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems
This paper describes the design of two half-rate clock and data recovery circuits for optical receivers. Targeting the data rate of 10-Gb/s, the rst implementation incorporates a ...
Jafar Savoj, Behzad Razavi