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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 6 months ago
Exploiting structure in an AIG based QBF solver
—In this paper we present a procedure for solving quantified boolean formulas (QBF), which uses And-Inverter Graphs (AIGs) as the core data-structure. We make extensive use of s...
Florian Pigorsch, Christoph Scholl
DATE
2009
IEEE
89views Hardware» more  DATE 2009»
14 years 6 months ago
Robust non-preemptive hard real-time scheduling for clustered multicore platforms
—Scheduling task graphs under hard (end-to-end) timing constraints is an extensively studied NP-hard problem of critical importance for predictable software mapping on Multiproce...
Michele Lombardi, Michela Milano, Luca Benini
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
14 years 6 months ago
Time and memory tradeoffs in the implementation of AUTOSAR components
—The adoption of AUTOSAR in the development of automotive electronics can increase the portability and reuse of functional components. Inside each component, the behavior is repr...
Alberto Ferrari, Marco Di Natale, Giacomo Gentile,...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 6 months ago
Analysis and optimization of NBTI induced clock skew in gated clock trees
NBTI (Negative Bias Temperature Instability) has emerged as the dominant PMOS device failure mechanism for sub100nm VLSI designs. There is little research to quantify its impact o...
Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram...
DATE
2009
IEEE
114views Hardware» more  DATE 2009»
14 years 6 months ago
Formal approaches to analog circuit verification
Erich Barke, Darius Grabowski, Helmut Graeb, Lars ...
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 6 months ago
An efficent dynamic multicast routing protocol for distributing traffic in NOCs
Nowadays, in MPSoCs and NoCs, multicast protocol is significantly used for many parallel applications such as cache coherency in distributed shared-memory architectures, clock sync...
Masoumeh Ebrahimi, Masoud Daneshtalab, Mohammad Ho...
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
14 years 6 months ago
UMTS MPSoC design evaluation using a system level design framework
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
Douglas Densmore, Alena Simalatsar, Abhijit Davare...
DATE
2009
IEEE
144views Hardware» more  DATE 2009»
14 years 6 months ago
Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Ake...
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 6 months ago
Static analysis to mitigate soft errors in register files
—With continuous technology scaling, soft errors are becoming an increasingly important design concern even for earth-bound applications. While compiler approaches have the poten...
Jongeun Lee, Aviral Shrivastava