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DATE
2009
IEEE
117views Hardware» more  DATE 2009»
14 years 6 months ago
Using dynamic compilation for continuing execution under reduced memory availability
—This paper explores the use of dynamic compilation for continuing execution even if one or more of the memory banks used by an application become temporarily unavailable (but th...
Ozcan Ozturk, Mahmut T. Kandemir
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 6 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
14 years 6 months ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
14 years 6 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 6 months ago
A highly resilient routing algorithm for fault-tolerant NoCs
Current trends in technology scaling foreshadow worsening transistor reliability as well as greater numbers of transistors in each system. The combination of these factors will so...
David Fick, Andrew DeOrio, Gregory K. Chen, Valeri...
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
14 years 6 months ago
Integrated scheduling and synthesis of control applications on distributed embedded systems
Many embedded control systems comprise several control loops that are closed over a network of computation nodes. In such systems, complex timing behavior and communication lead t...
Soheil Samii, Anton Cervin, Petru Eles, Zebo Peng
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
14 years 6 months ago
HLS-l: High-level synthesis of high performance latch-based circuits
An inherent performance gap between custom designs and ASICs is one of the reasons why many designers still start their designs from register transfer level (RTL) description rath...
Seungwhun Paik, Insup Shin, Youngsoo Shin
DATE
2009
IEEE
97views Hardware» more  DATE 2009»
14 years 6 months ago
Mode-based reconfiguration of critical software component architectures
Etienne Borde, Grégory Haïk, Laurent P...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 6 months ago
Performance optimal speed control of multi-core processors under thermal constraints
Abstract—Advances in chip-multiprocessor processing capabilities has led to an increased power consumption and temperature hotspots. Maintaining the on-chip temperature is import...
Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Ch...
DATE
2009
IEEE
244views Hardware» more  DATE 2009»
14 years 6 months ago
Contactless testing: Possibility or pipe-dream?
The traditionally wired interfaces of many electronic systems are in many applications being replaced by wireless interfaces. Testing of electronic systems (both integrated circui...
Erik Jan Marinissen, Dae Young Lee, John P. Hayes,...