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DAC
2005
ACM
15 years 15 days ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
DAC
2005
ACM
15 years 15 days ago
Fine-grained application source code profiling for ASIP design
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...
Kingshuk Karuri, Mohammad Abdullah Al Faruque, Ste...
DAC
2005
ACM
15 years 15 days ago
ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction
This paper presents an efficient hierarchical 3D capacitance extraction algorithm -- ICCAP. Most previous capacitance extraction algorithms introduce intermediate variables to fac...
Rong Jiang, Yi-Hao Chang, Charlie Chung-Ping Chen
DAC
2005
ACM
15 years 15 days ago
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Leakage energy consumption is an increasing concern in current and future CMOS technologygenerations. Procrastination scheduling, where task execution can be delayed to maximize t...
Ravindra Jejurikar, Rajesh K. Gupta
DAC
2005
ACM
15 years 15 days ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
DAC
2005
ACM
15 years 15 days ago
DTM: dynamic tone mapping for backlight scaling
- This paper proposes an approach for pixel transformation of the displayed image to increase the potential energy saving of the backlight scaling method. The proposed approach tak...
Ali Iranli, Massoud Pedram
DAC
2005
ACM
15 years 15 days ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
DAC
2005
ACM
15 years 15 days ago
Analysis of full-wave conductor system impedance over substrate using novel integration techniques
An efficient approach to full-wave impedance extraction is developed that accounts for substrate effects through the use of two-layer media Green's functions in a mixed-poten...
Xin Hu, Jung Hoon Lee, Jacob White, Luca Daniel
DAC
2005
ACM
15 years 15 days ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...