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IEEEPACT
2009
IEEE
13 years 8 months ago
Region Based Structure Layout Optimization by Selective Data Copying
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Ris...
IEEEPACT
2009
IEEE
13 years 8 months ago
Core-Selectability in Chip Multiprocessors
Abstract--The centralized structures necessary for the extraction of instruction-level parallelism (ILP) are consuming progressively smaller portions of the total die area of chip ...
Hashem Hashemi Najaf-abadi, Niket Kumar Choudhary,...
IEEEPACT
2009
IEEE
13 years 8 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
IDC
2009
Springer
13 years 8 months ago
Case-Study for TeamLog, a Theory of Teamwork
Barbara Dunin-Keplicz, Rineke Verbrugge, Michal Sl...
IDC
2009
Springer
13 years 8 months ago
Emergent Properties for Data Distribution in a Cognitive MAS
Emergence is a key element in the research of multi-agent systems. Emergent properties provide higher level features to a system formed of simpler individuals. So far, emergence ha...
Andrei Olaru, Cristian Gratie, Adina Magda Florea
IDC
2009
Springer
13 years 8 months ago
Efficient Broadcasting by Selective Forwarding
A major challenge faced in mobile ad hoc networks (MANETs) is locating devices for communication, especially in the case of high node mobility and sparse node density. Present solu...
Doina Bein, Ajoy Kumar Datta, Balaji Ashok Sathyan...
IDC
2009
Springer
13 years 8 months ago
WELSA: An Intelligent and Adaptive Web-Based Educational System
Elvira Popescu, Costin Badica, Lucian Moraret
ICS
2009
Tsinghua U.
13 years 8 months ago
Creating artificial global history to improve branch prediction accuracy
Modern processors require highly accurate branch prediction for good performance. As such, a number of branch predictors have been proposed with varying size and complexity. This ...
Leo Porter, Dean M. Tullsen
ICS
2009
Tsinghua U.
13 years 8 months ago
Refereeing conflicts in hardware transactional memory
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
Arrvindh Shriraman, Sandhya Dwarkadas
ICS
2009
Tsinghua U.
13 years 8 months ago
Efficient high performance collective communication for the cell blade
This paper presents high-performance collective communication algorithms and implementations that exploit the unique architectural features of the Cell heterogeneous multicore pro...
Qasim Ali, Samuel P. Midkiff, Vijay S. Pai