Core-Selectability in Chip Multiprocessors

Abstract--The centralized structures necessary for the extraction of instruction-level parallelism (ILP) are consuming progressively smaller portions of the total die area of chip multiprocessors (CMP). The reason for this is that scaling these structures does not enhance general performance as much as scaling the cache and interconnect. However, the fact that these structures now consume less proportional die area opens an avenue to enhancing their performance through truly overcoming the one-size-fits-all approach to their design. This paper proposes core-selectability

• Type: Journal
• Year: 2009
• Where: IEEEPACT
• Authors: Hashem Hashemi Najaf-abadi, Niket Kumar Choudhary, Eric Rotenberg
• Keywords: Chip Multiprocessor, Core Designs, Design, Distributed And Parallel Computing, IEEEPACT 2009