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ERSA
2010
137views Hardware» more  ERSA 2010»
13 years 8 months ago
An Automated Scheduling and Partitioning Algorithm for Scalable Reconfigurable Computing Systems
As reconfigurable computing (RC) platforms are becoming increasingly large-scale and heterogeneous, efficiently scheduling and partitioning applications on these platforms is a gro...
Casey Reardon, Alan D. George, Greg Stitt, Herman ...
ERSA
2010
153views Hardware» more  ERSA 2010»
13 years 8 months ago
VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems
- Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requiremen...
Ann Gordon-Ross, Abelardo Jara-Berrocal
ERSA
2010
159views Hardware» more  ERSA 2010»
13 years 9 months ago
Acceleration of FPGA Fault Injection Through Multi-Bit Testing
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
Grzegorz Cieslewski, Alan D. George, Adam Jacobs
ERSA
2010
182views Hardware» more  ERSA 2010»
13 years 9 months ago
Integrating Application Specification and Performance Prediction for Strategic Design-Space Exploration
Abstract--Modeling environments and performance prediction boost application productivity, but often lack integration into an efficient and comprehensive approach to strategic desi...
Brian Holland, Alan D. George, Herman Lam
ERSA
2010
119views Hardware» more  ERSA 2010»
13 years 9 months ago
Performance Visualization and Exploration for Reconfigurable Computing Applications
Reconfigurable computing (RC) applications have the potential for significant performance while consuming little power. Although runtime performance analysis of RC applications has...
Seth Koehler, Alan D. George
ERSA
2010
115views Hardware» more  ERSA 2010»
13 years 9 months ago
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
Research in communication networks has shown that the Internet architecture is not sufficient for modern communication areas such as the interconnection networks of super computing...
Enno Lübbers, Marco Platzner, Christian Pless...
ERSA
2010
186views Hardware» more  ERSA 2010»
13 years 9 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
ERSA
2010
172views Hardware» more  ERSA 2010»
13 years 9 months ago
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
Heiner Giefers, Marco Platzner
ERSA
2010
152views Hardware» more  ERSA 2010»
13 years 9 months ago
Persistent CAD for in-the-field Power Optimization
A major focus within the Integrated Chip (IC) industry is reducing power consumption of devices. In this paper, we explore the idea of persistent CAD algorithms that constantly imp...
Peter Jamieson
ERSA
2010
217views Hardware» more  ERSA 2010»
13 years 9 months ago
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...
Carlos González, Daniel Mozos, Javier Resan...