As reconfigurable computing (RC) platforms are becoming increasingly large-scale and heterogeneous, efficiently scheduling and partitioning applications on these platforms is a gro...
Casey Reardon, Alan D. George, Greg Stitt, Herman ...
- Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requiremen...
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
Abstract--Modeling environments and performance prediction boost application productivity, but often lack integration into an efficient and comprehensive approach to strategic desi...
Reconfigurable computing (RC) applications have the potential for significant performance while consuming little power. Although runtime performance analysis of RC applications has...
Research in communication networks has shown that the Internet architecture is not sufficient for modern communication areas such as the interconnection networks of super computing...
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
A major focus within the Integrated Chip (IC) industry is reducing power consumption of devices. In this paper, we explore the idea of persistent CAD algorithms that constantly imp...
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...