FPGA 2008 | Sciweavers

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FPGA
2008
ACM

145views FPGA» more FPGA 2008»

FPGA interconnect design using logical effort

14 years 5 months ago

Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...

Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong

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45

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FPGA
2008
ACM

146views FPGA» more FPGA 2008»

FPGA-optimised high-quality uniform random number generators

14 years 5 months ago

Download wwwhomes.doc.ic.ac.uk

This paper introduces a method of constructing random number generators from four of the basic primitives provided by FPGAs: Flip-Flips, Lookup-Tables, Shift Registers, and RAMs. ...

David B. Thomas, Wayne Luk

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43

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FPGA
2008
ACM

173views FPGA» more FPGA 2008»

The amorphous FPGA architecture

14 years 5 months ago

Download isl.stanford.edu

This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance...

Mingjie Lin

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