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    FPGA
    1995
    ACM
    88views FPGA» more  FPGA 1995»
    Spectral-Based Multi-Way FPGA Partitioning
    14 years 2 months ago
    Spectral-Based Multi-Way FPGA Partitioning
    Download  www.cecs.uci.edu
    Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
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    FPGA
    1995
    ACM
    93views FPGA» more  FPGA 1995»
    Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
    14 years 2 months ago
    Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
    Download  fmdb.cs.ucla.edu
    In this paper, we present an improvement of the FlowMap algorithm, named CutMap, which combines depth and area minimization in the mapping process by computing min-cost min-height...
    Jason Cong, Yean-Yow Hwang
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    FPGA
    1995
    ACM
    105views FPGA» more  FPGA 1995»
    On Nominal Delay Minimization in LUT-based FPGA Technology Mapping
    14 years 2 months ago
    On Nominal Delay Minimization in LUT-based FPGA Technology Mapping
    Download  cadlab.cs.ucla.edu
    We study the nominal delay minimization problem in LUTbased FPGA technologymapping, where interconnect delay is assumed proportionalto net fanout size. We prove that the delay-opt...
    Jason Cong, Yuzheng Ding
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    FPGA
    1995
    ACM
    136views FPGA» more  FPGA 1995»
    A Field-Programmable Mixed-Analog-Digital Array
    14 years 2 months ago
    A Field-Programmable Mixed-Analog-Digital Array
    Download  www.eecg.toronto.edu
    A novel field-programmable mixed-analog-digital array (FPMA) is proposed, which contains a field-programmable analog array, a field-programmable digital array, and a mixed-sign...
    Paul Chow, P. Glenn Gulak
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    FPL
    2000
    Springer
    116views Hardware» more  FPL 2000»
    High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
    14 years 2 months ago
    High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
    Download  www2.ife.ee.ethz.ch
    Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
    Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...
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    FPGA
    2000
    ACM
    109views FPGA» more  FPGA 2000»
    Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays
    14 years 2 months ago
    Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays
    Download  www.ece.ubc.ca
    It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown tha...
    Steven J. E. Wilton
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    FPGA
    2000
    ACM
    145views FPGA» more  FPGA 2000»
    A C compiler for a processor with a reconfigurable functional unit
    14 years 2 months ago
    A C compiler for a processor with a reconfigurable functional unit
    Download  www.ece.northwestern.edu
    This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
    Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerje...
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    FPGA
    2000
    ACM
    120views FPGA» more  FPGA 2000»
    A novel high throughput reconfigurable FPGA architecture
    14 years 2 months ago
    A novel high throughput reconfigurable FPGA architecture
    Download  www.cecs.uci.edu
    With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
    Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
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    FPGA
    2000
    ACM
    479views FPGA» more  FPGA 2000»
    Implementing a RAKE receiver for wireless communications on an FPGA-based computer system
    14 years 2 months ago
    Implementing a RAKE receiver for wireless communications on an FPGA-based computer system
    Download  www.cecs.uci.edu
    RAKE receivers are widely used in the wireless communications industry. Currently, custom VLSI is the most popular implementation. Programmable and reconfigurable logic implementa...
    Ali M. Shankiti, Miriam Leeser
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    FPGA
    2000
    ACM
    119views FPGA» more  FPGA 2000»
    Timing-driven placement for FPGAs
    14 years 2 months ago
    Timing-driven placement for FPGAs
    Download  www.eecg.toronto.edu
    In this paper we introduce a new Simulated Annealingbased timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a nove...
    Alexander Marquardt, Vaughn Betz, Jonathan Rose
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