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FPL
2000
Springer
95views Hardware» more  FPL 2000»
14 years 4 days ago
It's FPL, Jim - But Not as We Know It! Opportunities for the New Commercial Architectures
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Tom Kean
FPL
2000
Springer
103views Hardware» more  FPL 2000»
14 years 4 days ago
Evaluation of Accelerator Designs for Subgraph Isomorphism Problem
Many applications can be modeled as subgraph isomorphism problems. However, this problem is generally NP-complete and difficult to compute. A custom computing circuit is a prospect...
Shuichi Ichikawa, Hidemitsu Saito, Lerdtanaseangth...
FPL
2000
Springer
187views Hardware» more  FPL 2000»
14 years 4 days ago
Mapping of DSP Algorithms on Field Programmable Function Arrays
This position paper1 discusses reconfigurability issues in low-power handheld multimedia systems. A reconfigurable systems-architecture is introduced, with a focus on a Field Progr...
Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Pa...
FPL
2000
Springer
96views Hardware» more  FPL 2000»
14 years 4 days ago
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
Reiner W. Hartenstein, Michael Herz, Thomas Hoffma...
FPL
2000
Springer
116views Hardware» more  FPL 2000»
14 years 4 days ago
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...
FPL
2000
Springer
125views Hardware» more  FPL 2000»
14 years 4 days ago
Multiplexer Based Reconfiguration for Virtex Multipliers
A novel approach, based on a radix-4 Booth encoding, is presented for constant coefficient multipliers. The major advantage of this approach is that it reduces the amount of reconf...
Tim Courtney, Richard H. Turner, Roger Woods
FPL
2000
Springer
77views Hardware» more  FPL 2000»
14 years 4 days ago
Multiple-Wordlength Resource Binding
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
FPL
2000
Springer
116views Hardware» more  FPL 2000»
14 years 4 days ago
FPGA Implementation of a Prototype WDM On-Line Scheduler
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz...
FPL
2000
Springer
73views Hardware» more  FPL 2000»
14 years 4 days ago
Stream Computations Organized for Reconfigurable Execution (SCORE)
Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh,...