TCAD
2010
13 years 6 months ago
2010
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
DATE
2000
IEEE
14 years 3 months ago
2000
IEEE
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
DATE
2005
IEEE
14 years 5 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...