ICCAD
2003
IEEE
14 years 8 months ago
2003
IEEE
We present an analytic formula for repeater insertion in global interconnects that simultaneously minimizes silicon device area and power dissipation for a given performance qrj,/...
DAC
2004
ACM
15 years 16 days ago
2004
ACM
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...