ICFP
2010
ACM
14 years 18 days ago
2010
ACM
The leading implementations of graph reduction all target conventional processors designed for low-level imperative execution. In this paper, we present a processor specially desi...
ASPDAC
2007
ACM
14 years 3 months ago
2007
ACM
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...