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IEEEPACT
2008
IEEE
14 years 3 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
IEEEPACT
2008
IEEE
14 years 3 months ago
Mars: a MapReduce framework on graphics processors
We design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of ...
Bingsheng He, Wenbin Fang, Qiong Luo, Naga K. Govi...
IEEEPACT
2008
IEEE
14 years 3 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
IEEEPACT
2008
IEEE
14 years 3 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...
IEEEPACT
2008
IEEE
14 years 3 months ago
Improving support for locality and fine-grain sharing in chip multiprocessors
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...
IEEEPACT
2008
IEEE
14 years 3 months ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...
IEEEPACT
2008
IEEE
14 years 3 months ago
Redundancy elimination revisited
This work proposes and evaluates improvements to previously known algorithms for redundancy elimination. Enhanced Scalar Replacement combines two classic techniques, scalar replac...
Keith D. Cooper, Jason Eckhardt, Ken Kennedy
IEEEPACT
2008
IEEE
14 years 3 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
ICECCS
2008
IEEE
87views Hardware» more  ICECCS 2008»
14 years 3 months ago
A Scalable Approach to Multi-style Architectural Modeling and Verification
Stephen Wong, Jing Sun, Ian Warren, Jun Sun 0001