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IEEEPACT
2008
IEEE
14 years 3 months ago
Skewed redundancy
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
Gordon B. Bell, Mikko H. Lipasti
IEEEPACT
2008
IEEE
14 years 3 months ago
Multi-optimization power management for chip multiprocessors
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
Ke Meng, Russ Joseph, Robert P. Dick, Li Shang
IEEEPACT
2008
IEEE
14 years 3 months ago
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with...
Qiong Cai, José González, Ryan Rakvi...
IEEEPACT
2008
IEEE
14 years 3 months ago
Multi-mode energy management for multi-tier server clusters
This paper presents an energy management policy for reconfigurable clusters running a multi-tier application, exploiting DVS together with multiple sleep states. We develop a the...
Tibor Horvath, Kevin Skadron
IEEEPACT
2008
IEEE
14 years 3 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
IEEEPACT
2008
IEEE
14 years 3 months ago
Visualizing potential parallelism in sequential programs
Graham D. Price, John Giacomoni, Manish Vachharaja...
IEEEPACT
2008
IEEE
14 years 3 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
IEEEPACT
2008
IEEE
14 years 3 months ago
Adaptive insertion policies for managing shared caches
Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qu...
IEEEPACT
2008
IEEE
14 years 3 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...