Sciweavers

COMPSYSTECH
2010
13 years 8 months ago
A framework for source code metrics
Neli Maneva, Nikolay Grozev, Delyan Lilov
ASAP
2010
IEEE
185views Hardware» more  ASAP 2010»
13 years 8 months ago
ImpEDE: A multidimensional design-space exploration framework for biomedical-implant processors
Abstract—The demand for biomedical implants keeps increasing. However, most of the current implant design methodologies involve custom-ASIC design. The SiMS project aims to chang...
Dhara Dave, Christos Strydis, Georgi Gaydadjiev
ECMDAFA
2008
Springer
118views Hardware» more  ECMDAFA 2008»
13 years 9 months ago
A Metamodeling Approach for Reasoning about Requirements
In requirements engineering, there are several approaches for requirements modeling such as goal-oriented, aspect-driven, and system requirements modeling. In practice, companies o...
Arda Goknil, Ivan Kurtev, Klaas van den Berg
DDECS
2009
IEEE
116views Hardware» more  DDECS 2009»
13 years 9 months ago
MTPP - Modular Traffic Processing Platform
High-speed (10 Gb/s and above) network monitoring and traffic processing requires hardware acceleration. Different applications require different functions to be placed in hardware...
Jiri Halak, Sven Ubik
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
13 years 9 months ago
Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy
Abstract--DNA self-assembly is emerging as the most promising technique for nanoscale self-assembly as it uses the simple, yet precise rules of DNA binding to create macroscale ass...
Saturnino Garcia, Alex Orailoglu
ETS
2010
IEEE
140views Hardware» more  ETS 2010»
13 years 9 months ago
Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy
This paper explores the concept of design diversity redundancy applied to mixed-signal (MS) circuit blocks, as a proposal to increase system reliability. Three different implement...
Gabriel de M. Borges, Luiz F. Gonçalves, Ti...
ETS
2010
IEEE
150views Hardware» more  ETS 2010»
13 years 9 months ago
Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs
It was shown in the past that ATPG based on the Boolean Satisfiability problem is a beneficial complement to traditional ATPG techniques. Its advantages can be observed especially ...
Daniel Tille, Stephan Eggersglüß, Rene ...
ETS
2010
IEEE
174views Hardware» more  ETS 2010»
13 years 9 months ago
Test-architecture optimization for TSV-based 3D stacked ICs
Testing of 3D stacked ICs (SICs) is becoming increasingly important in the semiconductor industry. In this paper, we address the problem of test architecture optimization for 3D s...
Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakr...
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
13 years 9 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens