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ICCD
1993
IEEE
90views Hardware» more  ICCD 1993»
14 years 26 days ago
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip
In this paper the design of a high-speed cryptographic coprocessor is presented. This coprocessor is named Subterranean and can be used for both cryptographic pseudorandom sequenc...
Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Pee...
ICCD
1993
IEEE
94views Hardware» more  ICCD 1993»
14 years 26 days ago
Symbolic Analysis Methods for Masks, Circuits, and Systems
Symbolic representations of systems can achieve a high degree of compaction relative to more explicit forms. By casting an analysis task in terms of operations on a symbolic repre...
Randal E. Bryant
ICCAD
1993
IEEE
123views Hardware» more  ICCAD 1993»
14 years 26 days ago
Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
14 years 26 days ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
14 years 26 days ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
ICCAD
1993
IEEE
85views Hardware» more  ICCAD 1993»
14 years 26 days ago
Input don't care sequences in FSM networks
Current approaches to compute and exploit the flexibility of a component in an FSM network are all at the symbolic level [23, 30, 33, 31]. Conventionally, exploitation of this ï¬...
Huey-Yih Wang, Robert K. Brayton
ICCAD
1993
IEEE
101views Hardware» more  ICCAD 1993»
14 years 26 days ago
Convexity-based algorithms for design centering
A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the rst phase, the feasible region is approximated by a ...
Sachin S. Sapatnekar, Pravin M. Vaidya, Steve M. K...
ICCAD
1993
IEEE
120views Hardware» more  ICCAD 1993»
14 years 26 days ago
Merging multiple FSM controllers for DFT/BIST hardware
Debaditya Mukherjee, Massoud Pedram, Melvin A. Bre...