ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
- An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of addersubtractors used in the hardware implementation o...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
This paper presents a model for simultaneous instruction selection, compaction, and register allocation. An arc mapping model along with logical propositions is used to create an ...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
In this paper we present a method that allows to observe and control the emulation of communicating systems consisting of hardware and software parts. The approach provides the ab...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases . There exists some tools that give an o...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
ISSS
1997
IEEE
14 years 29 days ago
1997
IEEE
ISMVL
1997
IEEE
14 years 29 days ago
1997
IEEE
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...
ISMVL
1997
IEEE
14 years 29 days ago
1997
IEEE
In this paper, the minimization of incompletely specified multi-valued functions using functional decomposition is discussed. From the aspect of machine learning, learning sample...