ISQED
2006
IEEE
14 years 3 months ago
2006
IEEE
ISQED
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
ISQED
2006
IEEE
14 years 3 months ago
2006
IEEE
ISQED
2006
IEEE
14 years 3 months ago
2006
IEEE
Design for Manufacturability (DFM) is becoming increasingly important as process geometries shrink. Conventional design rule pass/fail is not adequate to quantify DFM compliance. ...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
RAID architectures have been used for more than two decades to recover data upon disk failures. Disk failure is just one of the many causes of damaged data. Data can be damaged by...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
Protection from hardware attacks such as snoopers and mod chips has been receiving increasing attention in computer architecture. This paper presents a new combined memory encrypt...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and a...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper describes the radix-64 folded-Clos network of the Cray BlackWidow scalable vector multiprocessor. We describe the BlackWidow network which scales to 32K processors with...