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ICCD
2002
IEEE
146views Hardware» more  ICCD 2002»
14 years 8 months ago
From ASIC to ASIP: The Next Design Discontinuity
A variety of factors is making it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). This has started a s...
Kurt Keutzer, Sharad Malik, A. Richard Newton
ICCD
2002
IEEE
138views Hardware» more  ICCD 2002»
14 years 8 months ago
The Imagine Stream Processor
The Imagine Stream Processor is a single-chip programmable media processor with 48 parallel ALUs. At 400 MHz, this translates to a peak arithmetic rate of 16 GFLOPS on single-prec...
Ujval J. Kapasi, William J. Dally, Scott Rixner, J...
ICCD
2002
IEEE
106views Hardware» more  ICCD 2002»
14 years 8 months ago
A Low Energy Set-Associative I-Cache with Extended BTB
This paper proposes a low-energy instruction-cache architecture, called history-based tag-comparison (HBTC) cache. The HBTC cache attempts to re-use tag-comparison results for avo...
Koji Inoue, Vasily G. Moshnyaga, Kazuaki Murakami
ICCD
2002
IEEE
132views Hardware» more  ICCD 2002»
14 years 8 months ago
Applying Decay Strategies to Branch Predictors for Leakage Energy Savings
With technology advancing toward deep submicron, leakage energy is of increasing concern, especially for large onchip array structures such as caches and branch predictors. Recent...
Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W....
ICCD
2002
IEEE
113views Hardware» more  ICCD 2002»
14 years 8 months ago
System-Architectures for Sensor Networks Issues, Alternatives, and Directions
Our goal is to identify the key architectural and design issues related to Sensor Networks (SNs), evaluate the proposed solutions, and to outline the most challenging research dir...
Jessica Feng, Farinaz Koushanfar, Miodrag Potkonja...
ICCD
2002
IEEE
70views Hardware» more  ICCD 2002»
14 years 8 months ago
Dynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with small loops, but only supports simple loops without taken branches. Preloaded ta...
Ann Gordon-Ross, Frank Vahid
ICCD
2002
IEEE
151views Hardware» more  ICCD 2002»
14 years 8 months ago
Adaptive Pipeline Depth Control for Processor Power-Management
A method of managing the power consumption of an embedded, single-issue processor by controlling its pipeline depth is proposed. The execution time will be increased but, if the m...
Aristides Efthymiou, Jim D. Garside
ICCD
2002
IEEE
164views Hardware» more  ICCD 2002»
14 years 8 months ago
Locating Tiny Sensors in Time and Space: A Case Study
— As the cost of embedded sensors and actuators drops, new applications will arise that exploit high density networks of small devices capable of a variety of sensing tasks. Alth...
Lewis Girod, Vladimir Bychkovskiy, Jeremy Elson, D...
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 8 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
ICCD
2002
IEEE
114views Hardware» more  ICCD 2002»
14 years 8 months ago
Balancing the Interconnect Topology for Arrays of Processors between Cost and Power
High performance SoC requires nonblocking interconnections between an array of processors built on one chip. With the advent of deep sub-micron technologies, switches are becoming...
Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Che...