Modern processors rely heavily on broadcast networks to bypass instruction results to dependent instructions in the pipeline. However, as clock rates increase, architectures get w...
Karthikeyan Sankaralingam, Vincent Ajay Singh, Ste...
Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead ma...
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
Analyzing the effect of crosstalk on delay is critical for high performance circuits. The major bottleneck in performing crosstalkinduced delay analysis is the high computational ...
NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high d...
Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim...
— We model the power fluctuation as cycle-to-cycle power gradient and minimize the mean of the power gradients using ILP. We propose scheduling schemes for three modes of datapa...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
Despite recent advances, battery life continues to be a limiting factor in mobile multimedia systems. Signiï¬cant energy savings can be achieved by adapting systems at runtime to...
Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadr...